The design is split into three sections - these are logically separable, but were all worked on in parallel to try and make sure nothing was forgotten.
- The interface to the 8-bit, this i/o section is primarily concerned with how the bus is managed from the perspective of the specific 8-bit host computer, what facilities are offered, and how the interaction takes place
- The slot-manager, which is all about how requests for data are handled on a per-device basis within the enclosure, and conversely how the devices can deliver data to the 8-bit without the host computer requesting anything. There is also the question of bus-mastering from device to host or device to device to consider.
- The physical enclosure. This is the engineering of the slot sizes, power, connectivity, etc.
From 10,000 feet, it's all pretty simple - there is a module that interacts with either the parallel bus on an XL, or the ECI/Cartridge bus on the XE or 1088XEL, or the module port on a C64, or … It's job is to route any data requests or transfers onto the correct card housed in the (probably) remote expansion box. There is another module in the expansion box that manages the cards, and finally there are the cards themselves.
The device module (housed in the expansion box) will be connected via CAT-6 ethernet cable to the host computer module and plugged into a standard RJ45 interface at both ends. Both modules will serialise the parallel bus architecture down to something that can be transferred over 3+1 wires (because we're using LVDS signals) and recomposed at the other end. In the case of the 1088XEL, we'll still use the CAT-6 cable, but one that is only 6" long…
Because of this, I've chosen to use an XMOS [PDF link to the datasheet] device - these can be thought of as being somewhere between a traditional micro controller and an FPGA. They provide multi-core "tiles" on each of which guaranteed performance can be relied upon, can monitor ports (in hardware) for changes, and can serialise and deserialise parallel data over an output port; crucially for my purpose they also provide a 2-bit "Xlink" which allows tiles on different chips to talk to each other as though they were on the same chip. If you've ever done anything with or heard about transputers, it's the same top-level guys…
The host interface, the device interface, and the enclosure are all presented on their own pages.
One major benefit of splitting the host and device side up like this is portability - we don't often think of portable hardware but if the defined interface is the same across multiple platforms, it offers the opportunity (if not requirement) for the same plug-in hardware device to work on different 8-bit micros.
I've never been a fan of fanboy-ism, and the "which computer is best, X or Y" quickly bores me - I'm more a fan of making something that (with the correct host-side adaptor) could allow plug-in hardware to work with any 8-bit micro with a fast-enough interface.
I think there's the possibility of things becoming more standard, and more hardware being developed that would work for more people that way, and at this stage of the game, I think that would be a win. If you prefer, think of it as harnessing all those other computer enthusiasts projects to become available for your own.